mirror of
https://github.com/johndoe6345789/MetalOS.git
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Complete C++ conversion - all files now use classes
Co-authored-by: johndoe6345789 <224850594+johndoe6345789@users.noreply.github.com>
This commit is contained in:
copilot-swe-agent[bot]
@@ -1,4 +1,3 @@
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// THIS IS C++ NOW
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/*
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* MetalOS Kernel - Interrupt Handling
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*
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@@ -22,50 +21,26 @@ static inline void outb(uint16_t port, uint8_t value) {
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#define PIC2_COMMAND 0xA0
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#define PIC2_DATA 0xA1
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// IDT entries (256 interrupts in x86_64)
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static idt_entry_t idt[256];
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static idt_ptr_t idt_ptr;
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// External ISR handlers (defined in interrupts_asm.asm)
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extern void isr0(void);
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extern void isr1(void);
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extern void isr2(void);
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extern void isr3(void);
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extern void isr4(void);
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extern void isr5(void);
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extern void isr6(void);
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extern void isr7(void);
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extern void isr8(void);
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extern void isr9(void);
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extern void isr10(void);
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extern void isr11(void);
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extern void isr12(void);
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extern void isr13(void);
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extern void isr14(void);
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extern void isr15(void);
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extern void isr16(void);
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extern void isr17(void);
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extern void isr18(void);
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extern void isr19(void);
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extern void isr20(void);
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extern void isr21(void);
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extern void isr22(void);
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extern void isr23(void);
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extern void isr24(void);
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extern void isr25(void);
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extern void isr26(void);
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extern void isr27(void);
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extern void isr28(void);
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extern void isr29(void);
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extern void isr30(void);
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extern void isr31(void);
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extern "C" {
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void isr0(void); void isr1(void); void isr2(void); void isr3(void);
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void isr4(void); void isr5(void); void isr6(void); void isr7(void);
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void isr8(void); void isr9(void); void isr10(void); void isr11(void);
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void isr12(void); void isr13(void); void isr14(void); void isr15(void);
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void isr16(void); void isr17(void); void isr18(void); void isr19(void);
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void isr20(void); void isr21(void); void isr22(void); void isr23(void);
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void isr24(void); void isr25(void); void isr26(void); void isr27(void);
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void isr28(void); void isr29(void); void isr30(void); void isr31(void);
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void irq0(void); void irq1(void);
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}
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// IRQ handlers
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extern void irq0(void);
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extern void irq1(void);
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// InterruptManager class implementation
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InterruptManager::InterruptManager() {
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idtPtr.limit = (sizeof(idt_entry_t) * 256) - 1;
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idtPtr.base = (uint64_t)&idt;
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}
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// Set an IDT entry
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static void idt_set_gate(uint8_t num, uint64_t handler, uint16_t selector, uint8_t flags) {
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void InterruptManager::setGate(uint8_t num, uint64_t handler, uint16_t selector, uint8_t flags) {
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idt[num].offset_low = handler & 0xFFFF;
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idt[num].offset_mid = (handler >> 16) & 0xFFFF;
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idt[num].offset_high = (handler >> 32) & 0xFFFFFFFF;
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@@ -75,19 +50,18 @@ static void idt_set_gate(uint8_t num, uint64_t handler, uint16_t selector, uint8
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idt[num].zero = 0;
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}
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// Remap PIC (Programmable Interrupt Controller)
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static void pic_remap(void) {
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void InterruptManager::remapPIC() {
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// ICW1: Initialize PIC
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outb(PIC1_COMMAND, 0x11); // Master PIC
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outb(PIC2_COMMAND, 0x11); // Slave PIC
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outb(PIC1_COMMAND, 0x11);
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outb(PIC2_COMMAND, 0x11);
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// ICW2: Set interrupt vector offsets
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outb(PIC1_DATA, 0x20); // Master offset to 0x20
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outb(PIC2_DATA, 0x28); // Slave offset to 0x28
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outb(PIC1_DATA, 0x20);
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outb(PIC2_DATA, 0x28);
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// ICW3: Set up cascade
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outb(PIC1_DATA, 0x04); // Tell master about slave
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outb(PIC2_DATA, 0x02); // Tell slave its cascade
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outb(PIC1_DATA, 0x04);
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outb(PIC2_DATA, 0x02);
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// ICW4: Set mode
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outb(PIC1_DATA, 0x01);
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@@ -98,74 +72,67 @@ static void pic_remap(void) {
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outb(PIC2_DATA, 0xFF);
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}
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// Initialize IDT
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void idt_init(void) {
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idt_ptr.limit = (sizeof(idt_entry_t) * 256) - 1;
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idt_ptr.base = (uint64_t)&idt;
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void InterruptManager::init() {
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// Clear IDT
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for (int i = 0; i < 256; i++) {
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idt_set_gate(i, 0, 0, 0);
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setGate(i, 0, 0, 0);
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}
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// Install exception handlers (ISRs 0-31)
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idt_set_gate(0, (uint64_t)isr0, 0x08, 0x8E);
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idt_set_gate(1, (uint64_t)isr1, 0x08, 0x8E);
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idt_set_gate(2, (uint64_t)isr2, 0x08, 0x8E);
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idt_set_gate(3, (uint64_t)isr3, 0x08, 0x8E);
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idt_set_gate(4, (uint64_t)isr4, 0x08, 0x8E);
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idt_set_gate(5, (uint64_t)isr5, 0x08, 0x8E);
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idt_set_gate(6, (uint64_t)isr6, 0x08, 0x8E);
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idt_set_gate(7, (uint64_t)isr7, 0x08, 0x8E);
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idt_set_gate(8, (uint64_t)isr8, 0x08, 0x8E);
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idt_set_gate(9, (uint64_t)isr9, 0x08, 0x8E);
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idt_set_gate(10, (uint64_t)isr10, 0x08, 0x8E);
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idt_set_gate(11, (uint64_t)isr11, 0x08, 0x8E);
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idt_set_gate(12, (uint64_t)isr12, 0x08, 0x8E);
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idt_set_gate(13, (uint64_t)isr13, 0x08, 0x8E);
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idt_set_gate(14, (uint64_t)isr14, 0x08, 0x8E);
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idt_set_gate(15, (uint64_t)isr15, 0x08, 0x8E);
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idt_set_gate(16, (uint64_t)isr16, 0x08, 0x8E);
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idt_set_gate(17, (uint64_t)isr17, 0x08, 0x8E);
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idt_set_gate(18, (uint64_t)isr18, 0x08, 0x8E);
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idt_set_gate(19, (uint64_t)isr19, 0x08, 0x8E);
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idt_set_gate(20, (uint64_t)isr20, 0x08, 0x8E);
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idt_set_gate(21, (uint64_t)isr21, 0x08, 0x8E);
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idt_set_gate(22, (uint64_t)isr22, 0x08, 0x8E);
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idt_set_gate(23, (uint64_t)isr23, 0x08, 0x8E);
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idt_set_gate(24, (uint64_t)isr24, 0x08, 0x8E);
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idt_set_gate(25, (uint64_t)isr25, 0x08, 0x8E);
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idt_set_gate(26, (uint64_t)isr26, 0x08, 0x8E);
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idt_set_gate(27, (uint64_t)isr27, 0x08, 0x8E);
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idt_set_gate(28, (uint64_t)isr28, 0x08, 0x8E);
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idt_set_gate(29, (uint64_t)isr29, 0x08, 0x8E);
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idt_set_gate(30, (uint64_t)isr30, 0x08, 0x8E);
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idt_set_gate(31, (uint64_t)isr31, 0x08, 0x8E);
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setGate(0, (uint64_t)isr0, 0x08, 0x8E);
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setGate(1, (uint64_t)isr1, 0x08, 0x8E);
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setGate(2, (uint64_t)isr2, 0x08, 0x8E);
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setGate(3, (uint64_t)isr3, 0x08, 0x8E);
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setGate(4, (uint64_t)isr4, 0x08, 0x8E);
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setGate(5, (uint64_t)isr5, 0x08, 0x8E);
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setGate(6, (uint64_t)isr6, 0x08, 0x8E);
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setGate(7, (uint64_t)isr7, 0x08, 0x8E);
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setGate(8, (uint64_t)isr8, 0x08, 0x8E);
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setGate(9, (uint64_t)isr9, 0x08, 0x8E);
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setGate(10, (uint64_t)isr10, 0x08, 0x8E);
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setGate(11, (uint64_t)isr11, 0x08, 0x8E);
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setGate(12, (uint64_t)isr12, 0x08, 0x8E);
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setGate(13, (uint64_t)isr13, 0x08, 0x8E);
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setGate(14, (uint64_t)isr14, 0x08, 0x8E);
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setGate(15, (uint64_t)isr15, 0x08, 0x8E);
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setGate(16, (uint64_t)isr16, 0x08, 0x8E);
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setGate(17, (uint64_t)isr17, 0x08, 0x8E);
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setGate(18, (uint64_t)isr18, 0x08, 0x8E);
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setGate(19, (uint64_t)isr19, 0x08, 0x8E);
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setGate(20, (uint64_t)isr20, 0x08, 0x8E);
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setGate(21, (uint64_t)isr21, 0x08, 0x8E);
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setGate(22, (uint64_t)isr22, 0x08, 0x8E);
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setGate(23, (uint64_t)isr23, 0x08, 0x8E);
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setGate(24, (uint64_t)isr24, 0x08, 0x8E);
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setGate(25, (uint64_t)isr25, 0x08, 0x8E);
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setGate(26, (uint64_t)isr26, 0x08, 0x8E);
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setGate(27, (uint64_t)isr27, 0x08, 0x8E);
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setGate(28, (uint64_t)isr28, 0x08, 0x8E);
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setGate(29, (uint64_t)isr29, 0x08, 0x8E);
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setGate(30, (uint64_t)isr30, 0x08, 0x8E);
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setGate(31, (uint64_t)isr31, 0x08, 0x8E);
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// Remap PIC
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pic_remap();
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remapPIC();
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// Install IRQ handlers (IRQs 0-15 mapped to 32-47)
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idt_set_gate(32, (uint64_t)irq0, 0x08, 0x8E); // Timer
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idt_set_gate(33, (uint64_t)irq1, 0x08, 0x8E); // Keyboard
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setGate(32, (uint64_t)irq0, 0x08, 0x8E);
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setGate(33, (uint64_t)irq1, 0x08, 0x8E);
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// Load IDT
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__asm__ volatile("lidt %0" : : "m"(idt_ptr));
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__asm__ volatile("lidt %0" : : "m"(idtPtr));
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// Enable interrupts
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__asm__ volatile("sti");
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}
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// Generic interrupt handler
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void interrupt_handler(registers_t* regs) {
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void InterruptManager::handleInterrupt(registers_t* regs) {
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// Handle specific interrupts
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if (regs->int_no == 32) {
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// Timer interrupt (IRQ0)
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timer_handler();
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}
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// TODO: Handle other interrupts (keyboard, etc.)
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// Send EOI (End of Interrupt)
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if (regs->int_no >= 32 && regs->int_no < 48) {
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// Check if we're using APIC or PIC
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@@ -175,11 +142,25 @@ void interrupt_handler(registers_t* regs) {
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} else {
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// Use legacy PIC EOI
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if (regs->int_no >= 40) {
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// Slave PIC
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outb(PIC2_COMMAND, 0x20);
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}
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// Master PIC
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outb(PIC1_COMMAND, 0x20);
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}
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}
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}
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// Global interrupt manager instance
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static InterruptManager globalInterruptManager;
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// C-compatible wrapper functions
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extern "C" {
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void idt_init(void) {
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globalInterruptManager.init();
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}
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void interrupt_handler(registers_t* regs) {
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globalInterruptManager.handleInterrupt(regs);
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}
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} // extern "C"
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@@ -1,10 +1,11 @@
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// THIS IS C++ NOW
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/*
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* MetalOS Kernel - Main Entry Point
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*
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* EXTREME MINIMAL kernel - only what's needed for QT6 Hello World.
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* Now with basic multicore support for better performance!
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* Just: boot -> init hardware (all cores) -> run app.
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*
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* C++ implementation: Root level function hands off to classes
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*/
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#include "kernel/kernel.h"
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@@ -19,21 +20,21 @@
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* Kernel main entry point
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* Called by bootloader with boot information
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*
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* Initializes all hardware including multicore support.
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* Simple design: all cores initialized but only BSP runs app.
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* Future: could distribute work across cores for better performance.
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* This is the root-level function that hands off to C++ classes
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* for hardware initialization and system management.
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*/
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void kernel_main(BootInfo* boot_info) {
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// Initialize GDT (Global Descriptor Table)
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extern "C" void kernel_main(BootInfo* boot_info) {
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// Initialize GDT (Global Descriptor Table) - using GDT class
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gdt_init();
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// Initialize IDT (Interrupt Descriptor Table)
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// Initialize IDT (Interrupt Descriptor Table) - using InterruptManager class
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idt_init();
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// Initialize physical memory manager
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// Initialize physical memory manager - using PhysicalMemoryManager class
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pmm_init(boot_info);
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// Initialize kernel heap (allocate 256 pages = 1MB for kernel heap)
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// Using HeapAllocator class
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void* heap_start_page = pmm_alloc_page();
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if (heap_start_page) {
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// Allocate additional pages for heap (256 pages total)
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@@ -43,13 +44,13 @@ void kernel_main(BootInfo* boot_info) {
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heap_init(heap_start_page, 256 * PAGE_SIZE); // 1MB heap
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}
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// Initialize timer (1000 Hz = 1ms per tick)
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// Initialize timer (1000 Hz = 1ms per tick) - using Timer class
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timer_init(TIMER_FREQUENCY);
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// Initialize PCI bus
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// Initialize PCI bus - using PCIManager class
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pci_init();
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// Initialize SMP (Symmetric Multi-Processing)
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// Initialize SMP (Symmetric Multi-Processing) - using SMPManager class
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// This will detect and start all available CPU cores
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smp_init();
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@@ -88,4 +89,10 @@ void kernel_main(BootInfo* boot_info) {
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* All cores available for future parallel processing.
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*
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* Total kernel size target: < 150 KB (with multicore support)
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*
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* C++ Design:
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* - Root-level kernel_main() function serves as entry point
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* - All subsystems implemented as classes (GDT, InterruptManager, Timer, etc.)
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* - Classes encapsulate state and behavior
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* - C-compatible wrappers maintain compatibility with assembly and bootloader
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*/
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@@ -1,4 +1,3 @@
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// THIS IS C++ NOW
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/*
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* MetalOS Kernel - SMP (Symmetric Multi-Processing) Support
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*
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@@ -10,11 +9,6 @@
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#include "kernel/apic.h"
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#include "kernel/memory.h"
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// CPU information array
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static cpu_info_t cpu_info[MAX_CPUS];
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static uint8_t cpu_count = 1; // Start with BSP
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static bool smp_enabled = false;
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// Bootstrap CPU is always CPU 0
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#define BSP_CPU_ID 0
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@@ -22,90 +16,95 @@ static bool smp_enabled = false;
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#define AP_TRAMPOLINE_ADDR 0x8000
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// AP startup code (will be copied to low memory)
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extern void ap_trampoline_start(void);
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extern void ap_trampoline_end(void);
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extern "C" {
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void ap_trampoline_start(void);
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void ap_trampoline_end(void);
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}
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// Get current CPU ID from APIC
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uint8_t smp_get_current_cpu(void) {
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if (!smp_enabled) {
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// SMPManager class implementation
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SMPManager::SMPManager() : cpuCount(1), smpEnabled(false) {
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// Initialize BSP
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cpuInfo[0].cpu_id = BSP_CPU_ID;
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cpuInfo[0].apic_id = 0;
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cpuInfo[0].online = false;
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cpuInfo[0].kernel_stack = 0;
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}
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uint8_t SMPManager::getCurrentCPU() const {
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if (!smpEnabled) {
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return BSP_CPU_ID;
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}
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uint8_t apic_id = apic_get_id();
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uint8_t apicId = apic_get_id();
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// Find CPU by APIC ID
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for (uint8_t i = 0; i < cpu_count; i++) {
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if (cpu_info[i].apic_id == apic_id) {
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return cpu_info[i].cpu_id;
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for (uint8_t i = 0; i < cpuCount; i++) {
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if (cpuInfo[i].apic_id == apicId) {
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return cpuInfo[i].cpu_id;
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}
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}
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return BSP_CPU_ID;
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}
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// Initialize a CPU entry
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static void smp_init_cpu(uint8_t cpu_id, uint8_t apic_id) {
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if (cpu_id >= MAX_CPUS) return;
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void SMPManager::initCPU(uint8_t cpuId, uint8_t apicId) {
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if (cpuId >= MAX_CPUS) return;
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cpu_info[cpu_id].cpu_id = cpu_id;
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cpu_info[cpu_id].apic_id = apic_id;
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cpu_info[cpu_id].online = false;
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cpu_info[cpu_id].kernel_stack = 0;
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||||
cpuInfo[cpuId].cpu_id = cpuId;
|
||||
cpuInfo[cpuId].apic_id = apicId;
|
||||
cpuInfo[cpuId].online = false;
|
||||
cpuInfo[cpuId].kernel_stack = 0;
|
||||
}
|
||||
|
||||
// Mark CPU as online
|
||||
void smp_cpu_online(uint8_t cpu_id) {
|
||||
if (cpu_id < MAX_CPUS) {
|
||||
cpu_info[cpu_id].online = true;
|
||||
void SMPManager::markCPUOnline(uint8_t cpuId) {
|
||||
if (cpuId < MAX_CPUS) {
|
||||
cpuInfo[cpuId].online = true;
|
||||
}
|
||||
}
|
||||
|
||||
// Simple delay for AP startup
|
||||
static void smp_delay(uint32_t microseconds) {
|
||||
void SMPManager::delay(uint32_t microseconds) {
|
||||
// Approximate delay (not precise)
|
||||
for (volatile uint32_t i = 0; i < microseconds * 100; i++) {
|
||||
__asm__ volatile("pause");
|
||||
}
|
||||
}
|
||||
|
||||
// Start an Application Processor
|
||||
static bool smp_start_ap(uint8_t apic_id) {
|
||||
bool SMPManager::startAP(uint8_t apicId) {
|
||||
// Send INIT IPI
|
||||
apic_send_ipi(apic_id, 0, APIC_IPI_INIT);
|
||||
smp_delay(10000); // 10ms
|
||||
apic_send_ipi(apicId, 0, APIC_IPI_INIT);
|
||||
delay(10000); // 10ms
|
||||
|
||||
// Send SIPI (Startup IPI) with trampoline address
|
||||
uint8_t vector = AP_TRAMPOLINE_ADDR >> 12; // Page number
|
||||
apic_send_ipi(apic_id, vector, APIC_IPI_STARTUP);
|
||||
smp_delay(200); // 200us
|
||||
apic_send_ipi(apicId, vector, APIC_IPI_STARTUP);
|
||||
delay(200); // 200us
|
||||
|
||||
// Send second SIPI (as per Intel spec)
|
||||
apic_send_ipi(apic_id, vector, APIC_IPI_STARTUP);
|
||||
smp_delay(200); // 200us
|
||||
apic_send_ipi(apicId, vector, APIC_IPI_STARTUP);
|
||||
delay(200); // 200us
|
||||
|
||||
// Wait for AP to come online (timeout after 1 second)
|
||||
for (int i = 0; i < 100; i++) {
|
||||
// Check if AP marked itself online
|
||||
for (uint8_t cpu_id = 0; cpu_id < cpu_count; cpu_id++) {
|
||||
if (cpu_info[cpu_id].apic_id == apic_id && cpu_info[cpu_id].online) {
|
||||
for (uint8_t cpuId = 0; cpuId < cpuCount; cpuId++) {
|
||||
if (cpuInfo[cpuId].apic_id == apicId && cpuInfo[cpuId].online) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
smp_delay(10000); // 10ms
|
||||
delay(10000); // 10ms
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
// Initialize SMP
|
||||
void smp_init(void) {
|
||||
void SMPManager::init() {
|
||||
// Check if APIC is available
|
||||
if (!apic_is_available()) {
|
||||
// Single core mode
|
||||
smp_init_cpu(BSP_CPU_ID, 0);
|
||||
cpu_info[BSP_CPU_ID].online = true;
|
||||
cpu_count = 1;
|
||||
smp_enabled = false;
|
||||
initCPU(BSP_CPU_ID, 0);
|
||||
cpuInfo[BSP_CPU_ID].online = true;
|
||||
cpuCount = 1;
|
||||
smpEnabled = false;
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -113,48 +112,74 @@ void smp_init(void) {
|
||||
apic_init();
|
||||
|
||||
// Get BSP APIC ID
|
||||
uint8_t bsp_apic_id = apic_get_id();
|
||||
smp_init_cpu(BSP_CPU_ID, bsp_apic_id);
|
||||
cpu_info[BSP_CPU_ID].online = true;
|
||||
uint8_t bspApicId = apic_get_id();
|
||||
initCPU(BSP_CPU_ID, bspApicId);
|
||||
cpuInfo[BSP_CPU_ID].online = true;
|
||||
|
||||
// Detect additional CPUs from APIC
|
||||
// For simplicity, we'll try to start CPUs with sequential APIC IDs
|
||||
// A real implementation would parse ACPI MADT table
|
||||
uint8_t maxCPUsToTry = 12; // Try up to 12 logical processors
|
||||
|
||||
uint8_t max_cpus_to_try = 12; // Try up to 12 logical processors
|
||||
|
||||
for (uint8_t apic_id = 0; apic_id < max_cpus_to_try && cpu_count < MAX_CPUS; apic_id++) {
|
||||
for (uint8_t apicId = 0; apicId < maxCPUsToTry && cpuCount < MAX_CPUS; apicId++) {
|
||||
// Skip BSP
|
||||
if (apic_id == bsp_apic_id) {
|
||||
if (apicId == bspApicId) {
|
||||
continue;
|
||||
}
|
||||
|
||||
// Initialize CPU entry
|
||||
smp_init_cpu(cpu_count, apic_id);
|
||||
initCPU(cpuCount, apicId);
|
||||
|
||||
// Try to start this AP
|
||||
if (smp_start_ap(apic_id)) {
|
||||
cpu_count++;
|
||||
if (startAP(apicId)) {
|
||||
cpuCount++;
|
||||
}
|
||||
}
|
||||
|
||||
smp_enabled = (cpu_count > 1);
|
||||
smpEnabled = (cpuCount > 1);
|
||||
}
|
||||
|
||||
// Get number of CPUs
|
||||
uint8_t smp_get_cpu_count(void) {
|
||||
return cpu_count;
|
||||
uint8_t SMPManager::getCPUCount() const {
|
||||
return cpuCount;
|
||||
}
|
||||
|
||||
// Check if SMP is enabled
|
||||
bool smp_is_enabled(void) {
|
||||
return smp_enabled;
|
||||
bool SMPManager::isEnabled() const {
|
||||
return smpEnabled;
|
||||
}
|
||||
|
||||
// Get CPU info
|
||||
cpu_info_t* smp_get_cpu_info(uint8_t cpu_id) {
|
||||
if (cpu_id >= MAX_CPUS) {
|
||||
return NULL;
|
||||
cpu_info_t* SMPManager::getCPUInfo(uint8_t cpuId) {
|
||||
if (cpuId >= MAX_CPUS) {
|
||||
return nullptr;
|
||||
}
|
||||
return &cpu_info[cpu_id];
|
||||
return &cpuInfo[cpuId];
|
||||
}
|
||||
|
||||
// Global SMP manager instance
|
||||
static SMPManager globalSMP;
|
||||
|
||||
// C-compatible wrapper functions
|
||||
extern "C" {
|
||||
|
||||
void smp_init(void) {
|
||||
globalSMP.init();
|
||||
}
|
||||
|
||||
uint8_t smp_get_cpu_count(void) {
|
||||
return globalSMP.getCPUCount();
|
||||
}
|
||||
|
||||
uint8_t smp_get_current_cpu(void) {
|
||||
return globalSMP.getCurrentCPU();
|
||||
}
|
||||
|
||||
bool smp_is_enabled(void) {
|
||||
return globalSMP.isEnabled();
|
||||
}
|
||||
|
||||
cpu_info_t* smp_get_cpu_info(uint8_t cpu_id) {
|
||||
return globalSMP.getCPUInfo(cpu_id);
|
||||
}
|
||||
|
||||
void smp_cpu_online(uint8_t cpu_id) {
|
||||
globalSMP.markCPUOnline(cpu_id);
|
||||
}
|
||||
|
||||
} // extern "C"
|
||||
|
||||
Reference in New Issue
Block a user