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https://github.com/johndoe6345789/MetalOS.git
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Add CMake, Ninja, and Conan support with kernel modules (GDT, interrupts)
Co-authored-by: johndoe6345789 <224850594+johndoe6345789@users.noreply.github.com>
This commit is contained in:
copilot-swe-agent[bot]
79
kernel/CMakeLists.txt
Normal file
79
kernel/CMakeLists.txt
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@@ -0,0 +1,79 @@
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# MetalOS Kernel CMakeLists
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# Include directories
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include_directories(include)
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# Source files
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set(KERNEL_C_SOURCES
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src/main.c
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src/gdt.c
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src/interrupts.c
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)
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set(KERNEL_ASM_SOURCES
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src/gdt_flush.asm
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src/interrupts_asm.asm
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)
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# Kernel-specific C compiler flags
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set(KERNEL_CFLAGS
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-mcmodel=large
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-O2
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)
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# Create kernel C object files
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add_library(kernel_c_objs OBJECT
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${KERNEL_C_SOURCES}
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)
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target_compile_options(kernel_c_objs PRIVATE ${KERNEL_CFLAGS})
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target_include_directories(kernel_c_objs PRIVATE include)
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# Create kernel ASM object files separately
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# We need to avoid CMake adding C flags to NASM
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foreach(asm_file ${KERNEL_ASM_SOURCES})
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get_filename_component(asm_name ${asm_file} NAME_WE)
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set(asm_obj ${CMAKE_CURRENT_BINARY_DIR}/${asm_name}.o)
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add_custom_command(
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OUTPUT ${asm_obj}
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COMMAND ${CMAKE_ASM_NASM_COMPILER}
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-f elf64
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-I ${CMAKE_CURRENT_SOURCE_DIR}/include
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-o ${asm_obj}
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${CMAKE_CURRENT_SOURCE_DIR}/${asm_file}
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DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/${asm_file}
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COMMENT "Assembling ${asm_file}"
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VERBATIM
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)
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list(APPEND KERNEL_ASM_OBJS ${asm_obj})
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endforeach()
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# Custom target for ASM objects
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add_custom_target(kernel_asm_objs
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DEPENDS ${KERNEL_ASM_OBJS}
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)
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# Link kernel binary
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add_custom_command(
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OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/metalos.bin
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COMMAND ${CMAKE_LINKER}
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-nostdlib
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-T ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld
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$<TARGET_OBJECTS:kernel_c_objs>
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${KERNEL_ASM_OBJS}
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-o ${CMAKE_CURRENT_BINARY_DIR}/metalos.bin
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DEPENDS kernel_c_objs kernel_asm_objs ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld
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COMMENT "Linking kernel binary"
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COMMAND_EXPAND_LISTS
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)
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add_custom_target(kernel ALL
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DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/metalos.bin
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)
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# Install kernel binary
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install(FILES ${CMAKE_CURRENT_BINARY_DIR}/metalos.bin
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DESTINATION bin
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)
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25
kernel/include/kernel/gdt.h
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25
kernel/include/kernel/gdt.h
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@@ -0,0 +1,25 @@
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#ifndef METALOS_KERNEL_GDT_H
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#define METALOS_KERNEL_GDT_H
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#include <stdint.h>
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// GDT Entry structure
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typedef struct {
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uint16_t limit_low;
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uint16_t base_low;
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uint8_t base_middle;
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uint8_t access;
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uint8_t granularity;
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uint8_t base_high;
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} __attribute__((packed)) gdt_entry_t;
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// GDT Pointer structure
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typedef struct {
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uint16_t limit;
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uint64_t base;
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} __attribute__((packed)) gdt_ptr_t;
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// Initialize the Global Descriptor Table
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void gdt_init(void);
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#endif // METALOS_KERNEL_GDT_H
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37
kernel/include/kernel/interrupts.h
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37
kernel/include/kernel/interrupts.h
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@@ -0,0 +1,37 @@
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#ifndef METALOS_KERNEL_INTERRUPTS_H
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#define METALOS_KERNEL_INTERRUPTS_H
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#include <stdint.h>
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// IDT Entry structure
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typedef struct {
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uint16_t offset_low; // Offset bits 0-15
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uint16_t selector; // Code segment selector
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uint8_t ist; // Interrupt Stack Table offset
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uint8_t type_attr; // Type and attributes
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uint16_t offset_mid; // Offset bits 16-31
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uint32_t offset_high; // Offset bits 32-63
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uint32_t zero; // Reserved
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} __attribute__((packed)) idt_entry_t;
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// IDT Pointer structure
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typedef struct {
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uint16_t limit;
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uint64_t base;
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} __attribute__((packed)) idt_ptr_t;
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// CPU registers state (for interrupt handlers)
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typedef struct {
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uint64_t r15, r14, r13, r12, r11, r10, r9, r8;
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uint64_t rbp, rdi, rsi, rdx, rcx, rbx, rax;
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uint64_t int_no, err_code;
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uint64_t rip, cs, rflags, rsp, ss;
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} __attribute__((packed)) registers_t;
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// Initialize Interrupt Descriptor Table
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void idt_init(void);
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// Generic interrupt handler (called from assembly)
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void interrupt_handler(registers_t* regs);
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#endif // METALOS_KERNEL_INTERRUPTS_H
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56
kernel/src/gdt.c
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56
kernel/src/gdt.c
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@@ -0,0 +1,56 @@
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/*
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* MetalOS Kernel - Global Descriptor Table (GDT)
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*
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* Minimal GDT setup for x86_64 long mode
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* Only what's needed for our single-app OS
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*/
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#include "kernel/gdt.h"
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// GDT entries (minimal for x86_64)
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// In long mode, most segmentation is ignored, but we still need a valid GDT
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static gdt_entry_t gdt[5];
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static gdt_ptr_t gdt_ptr;
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// Set a GDT entry
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static void gdt_set_gate(int num, uint32_t base, uint32_t limit, uint8_t access, uint8_t gran) {
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gdt[num].base_low = (base & 0xFFFF);
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gdt[num].base_middle = (base >> 16) & 0xFF;
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gdt[num].base_high = (base >> 24) & 0xFF;
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gdt[num].limit_low = (limit & 0xFFFF);
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gdt[num].granularity = (limit >> 16) & 0x0F;
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gdt[num].granularity |= gran & 0xF0;
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gdt[num].access = access;
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}
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// Load GDT (assembly)
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extern void gdt_flush(uint64_t);
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// Initialize GDT
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void gdt_init(void) {
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gdt_ptr.limit = (sizeof(gdt_entry_t) * 5) - 1;
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gdt_ptr.base = (uint64_t)&gdt;
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// Null descriptor
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gdt_set_gate(0, 0, 0, 0, 0);
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// Kernel code segment (64-bit)
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// Access: Present, Ring 0, Code, Executable, Readable
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gdt_set_gate(1, 0, 0xFFFFFFFF, 0x9A, 0xA0);
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// Kernel data segment (64-bit)
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// Access: Present, Ring 0, Data, Writable
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gdt_set_gate(2, 0, 0xFFFFFFFF, 0x92, 0xC0);
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// User code segment (64-bit)
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// Access: Present, Ring 3, Code, Executable, Readable
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gdt_set_gate(3, 0, 0xFFFFFFFF, 0xFA, 0xA0);
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// User data segment (64-bit)
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// Access: Present, Ring 3, Data, Writable
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gdt_set_gate(4, 0, 0xFFFFFFFF, 0xF2, 0xC0);
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// Flush GDT
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gdt_flush((uint64_t)&gdt_ptr);
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}
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26
kernel/src/gdt_flush.asm
Normal file
26
kernel/src/gdt_flush.asm
Normal file
@@ -0,0 +1,26 @@
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; GDT flush assembly routine
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; Load new GDT and update segment registers
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global gdt_flush
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extern gdt_ptr
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section .text
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bits 64
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gdt_flush:
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lgdt [rdi] ; Load GDT pointer (first argument in rdi)
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; Reload segments
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mov ax, 0x10 ; Kernel data segment offset
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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; Far return to reload CS
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pop rdi ; Get return address
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mov rax, 0x08 ; Kernel code segment offset
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push rax
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push rdi
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retfq ; Far return
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160
kernel/src/interrupts.c
Normal file
160
kernel/src/interrupts.c
Normal file
@@ -0,0 +1,160 @@
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/*
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* MetalOS Kernel - Interrupt Handling
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*
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* Minimal IDT and interrupt handlers
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* Only essential interrupts for QT6 app
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*/
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#include "kernel/interrupts.h"
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// IDT entries (256 interrupts in x86_64)
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static idt_entry_t idt[256];
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static idt_ptr_t idt_ptr;
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// External ISR handlers (defined in interrupts_asm.asm)
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extern void isr0(void);
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extern void isr1(void);
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extern void isr2(void);
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extern void isr3(void);
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extern void isr4(void);
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extern void isr5(void);
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extern void isr6(void);
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extern void isr7(void);
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extern void isr8(void);
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extern void isr9(void);
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extern void isr10(void);
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extern void isr11(void);
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extern void isr12(void);
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extern void isr13(void);
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extern void isr14(void);
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extern void isr15(void);
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extern void isr16(void);
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extern void isr17(void);
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extern void isr18(void);
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extern void isr19(void);
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extern void isr20(void);
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extern void isr21(void);
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extern void isr22(void);
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extern void isr23(void);
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extern void isr24(void);
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extern void isr25(void);
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extern void isr26(void);
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extern void isr27(void);
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extern void isr28(void);
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extern void isr29(void);
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extern void isr30(void);
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extern void isr31(void);
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// IRQ handlers
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extern void irq0(void);
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extern void irq1(void);
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// Set an IDT entry
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static void idt_set_gate(uint8_t num, uint64_t handler, uint16_t selector, uint8_t flags) {
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idt[num].offset_low = handler & 0xFFFF;
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idt[num].offset_mid = (handler >> 16) & 0xFFFF;
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idt[num].offset_high = (handler >> 32) & 0xFFFFFFFF;
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idt[num].selector = selector;
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idt[num].ist = 0;
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idt[num].type_attr = flags;
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idt[num].zero = 0;
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}
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// Remap PIC (Programmable Interrupt Controller)
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static void pic_remap(void) {
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// ICW1: Initialize PIC
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__asm__ volatile("outb %0, $0x20" : : "a"((uint8_t)0x11)); // Master PIC
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__asm__ volatile("outb %0, $0xA0" : : "a"((uint8_t)0x11)); // Slave PIC
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// ICW2: Set interrupt vector offsets
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__asm__ volatile("outb %0, $0x21" : : "a"((uint8_t)0x20)); // Master offset to 0x20
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__asm__ volatile("outb %0, $0xA1" : : "a"((uint8_t)0x28)); // Slave offset to 0x28
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// ICW3: Set up cascade
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__asm__ volatile("outb %0, $0x21" : : "a"((uint8_t)0x04)); // Tell master about slave
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__asm__ volatile("outb %0, $0xA1" : : "a"((uint8_t)0x02)); // Tell slave its cascade
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// ICW4: Set mode
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__asm__ volatile("outb %0, $0x21" : : "a"((uint8_t)0x01));
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__asm__ volatile("outb %0, $0xA1" : : "a"((uint8_t)0x01));
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// Mask all interrupts initially
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__asm__ volatile("outb %0, $0x21" : : "a"((uint8_t)0xFF));
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__asm__ volatile("outb %0, $0xA1" : : "a"((uint8_t)0xFF));
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}
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// Initialize IDT
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void idt_init(void) {
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idt_ptr.limit = (sizeof(idt_entry_t) * 256) - 1;
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idt_ptr.base = (uint64_t)&idt;
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// Clear IDT
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for (int i = 0; i < 256; i++) {
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idt_set_gate(i, 0, 0, 0);
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}
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// Install exception handlers (ISRs 0-31)
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idt_set_gate(0, (uint64_t)isr0, 0x08, 0x8E);
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idt_set_gate(1, (uint64_t)isr1, 0x08, 0x8E);
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idt_set_gate(2, (uint64_t)isr2, 0x08, 0x8E);
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idt_set_gate(3, (uint64_t)isr3, 0x08, 0x8E);
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idt_set_gate(4, (uint64_t)isr4, 0x08, 0x8E);
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idt_set_gate(5, (uint64_t)isr5, 0x08, 0x8E);
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idt_set_gate(6, (uint64_t)isr6, 0x08, 0x8E);
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idt_set_gate(7, (uint64_t)isr7, 0x08, 0x8E);
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idt_set_gate(8, (uint64_t)isr8, 0x08, 0x8E);
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idt_set_gate(9, (uint64_t)isr9, 0x08, 0x8E);
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idt_set_gate(10, (uint64_t)isr10, 0x08, 0x8E);
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idt_set_gate(11, (uint64_t)isr11, 0x08, 0x8E);
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idt_set_gate(12, (uint64_t)isr12, 0x08, 0x8E);
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idt_set_gate(13, (uint64_t)isr13, 0x08, 0x8E);
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idt_set_gate(14, (uint64_t)isr14, 0x08, 0x8E);
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idt_set_gate(15, (uint64_t)isr15, 0x08, 0x8E);
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idt_set_gate(16, (uint64_t)isr16, 0x08, 0x8E);
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idt_set_gate(17, (uint64_t)isr17, 0x08, 0x8E);
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idt_set_gate(18, (uint64_t)isr18, 0x08, 0x8E);
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idt_set_gate(19, (uint64_t)isr19, 0x08, 0x8E);
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idt_set_gate(20, (uint64_t)isr20, 0x08, 0x8E);
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idt_set_gate(21, (uint64_t)isr21, 0x08, 0x8E);
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idt_set_gate(22, (uint64_t)isr22, 0x08, 0x8E);
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idt_set_gate(23, (uint64_t)isr23, 0x08, 0x8E);
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idt_set_gate(24, (uint64_t)isr24, 0x08, 0x8E);
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idt_set_gate(25, (uint64_t)isr25, 0x08, 0x8E);
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idt_set_gate(26, (uint64_t)isr26, 0x08, 0x8E);
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idt_set_gate(27, (uint64_t)isr27, 0x08, 0x8E);
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idt_set_gate(28, (uint64_t)isr28, 0x08, 0x8E);
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idt_set_gate(29, (uint64_t)isr29, 0x08, 0x8E);
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idt_set_gate(30, (uint64_t)isr30, 0x08, 0x8E);
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idt_set_gate(31, (uint64_t)isr31, 0x08, 0x8E);
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// Remap PIC
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pic_remap();
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// Install IRQ handlers (IRQs 0-15 mapped to 32-47)
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idt_set_gate(32, (uint64_t)irq0, 0x08, 0x8E); // Timer
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idt_set_gate(33, (uint64_t)irq1, 0x08, 0x8E); // Keyboard
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// Load IDT
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__asm__ volatile("lidt %0" : : "m"(idt_ptr));
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// Enable interrupts
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__asm__ volatile("sti");
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}
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// Generic interrupt handler
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void interrupt_handler(registers_t* regs) {
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// Handle interrupt based on interrupt number
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(void)regs; // Suppress unused warning for now
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// TODO: Dispatch to specific handlers based on regs->int_no
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// Send EOI (End of Interrupt) to PIC if this was an IRQ
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if (regs->int_no >= 32 && regs->int_no < 48) {
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if (regs->int_no >= 40) {
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// Slave PIC
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__asm__ volatile("outb %0, $0xA0" : : "a"((uint8_t)0x20));
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}
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// Master PIC
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__asm__ volatile("outb %0, $0x20" : : "a"((uint8_t)0x20));
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}
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}
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120
kernel/src/interrupts_asm.asm
Normal file
120
kernel/src/interrupts_asm.asm
Normal file
@@ -0,0 +1,120 @@
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; Interrupt Service Routines (ISRs) for x86_64
|
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; Assembly stubs that save state and call C handler
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global isr0, isr1, isr2, isr3, isr4, isr5, isr6, isr7
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global isr8, isr9, isr10, isr11, isr12, isr13, isr14, isr15
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global isr16, isr17, isr18, isr19, isr20, isr21, isr22, isr23
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global isr24, isr25, isr26, isr27, isr28, isr29, isr30, isr31
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global irq0, irq1
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extern interrupt_handler
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section .text
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bits 64
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; Macro for ISRs without error code
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||||
%macro ISR_NOERRCODE 1
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isr%1:
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push qword 0 ; Dummy error code
|
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push qword %1 ; Interrupt number
|
||||
jmp isr_common_stub
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||||
%endmacro
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||||
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||||
; Macro for ISRs with error code
|
||||
%macro ISR_ERRCODE 1
|
||||
isr%1:
|
||||
push qword %1 ; Interrupt number
|
||||
jmp isr_common_stub
|
||||
%endmacro
|
||||
|
||||
; Macro for IRQs
|
||||
%macro IRQ 2
|
||||
irq%1:
|
||||
push qword 0 ; Dummy error code
|
||||
push qword %2 ; Interrupt number
|
||||
jmp isr_common_stub
|
||||
%endmacro
|
||||
|
||||
; CPU Exceptions (0-31)
|
||||
ISR_NOERRCODE 0 ; Divide by zero
|
||||
ISR_NOERRCODE 1 ; Debug
|
||||
ISR_NOERRCODE 2 ; Non-maskable interrupt
|
||||
ISR_NOERRCODE 3 ; Breakpoint
|
||||
ISR_NOERRCODE 4 ; Overflow
|
||||
ISR_NOERRCODE 5 ; Bound range exceeded
|
||||
ISR_NOERRCODE 6 ; Invalid opcode
|
||||
ISR_NOERRCODE 7 ; Device not available
|
||||
ISR_ERRCODE 8 ; Double fault
|
||||
ISR_NOERRCODE 9 ; Coprocessor segment overrun
|
||||
ISR_ERRCODE 10 ; Invalid TSS
|
||||
ISR_ERRCODE 11 ; Segment not present
|
||||
ISR_ERRCODE 12 ; Stack-segment fault
|
||||
ISR_ERRCODE 13 ; General protection fault
|
||||
ISR_ERRCODE 14 ; Page fault
|
||||
ISR_NOERRCODE 15 ; Reserved
|
||||
ISR_NOERRCODE 16 ; x87 floating-point exception
|
||||
ISR_ERRCODE 17 ; Alignment check
|
||||
ISR_NOERRCODE 18 ; Machine check
|
||||
ISR_NOERRCODE 19 ; SIMD floating-point exception
|
||||
ISR_NOERRCODE 20 ; Virtualization exception
|
||||
ISR_NOERRCODE 21 ; Reserved
|
||||
ISR_NOERRCODE 22 ; Reserved
|
||||
ISR_NOERRCODE 23 ; Reserved
|
||||
ISR_NOERRCODE 24 ; Reserved
|
||||
ISR_NOERRCODE 25 ; Reserved
|
||||
ISR_NOERRCODE 26 ; Reserved
|
||||
ISR_NOERRCODE 27 ; Reserved
|
||||
ISR_NOERRCODE 28 ; Reserved
|
||||
ISR_NOERRCODE 29 ; Reserved
|
||||
ISR_ERRCODE 30 ; Security exception
|
||||
ISR_NOERRCODE 31 ; Reserved
|
||||
|
||||
; IRQs (32-47)
|
||||
IRQ 0, 32 ; Timer
|
||||
IRQ 1, 33 ; Keyboard
|
||||
|
||||
; Common ISR stub - saves state and calls C handler
|
||||
isr_common_stub:
|
||||
; Save all general purpose registers
|
||||
push rax
|
||||
push rbx
|
||||
push rcx
|
||||
push rdx
|
||||
push rsi
|
||||
push rdi
|
||||
push rbp
|
||||
push r8
|
||||
push r9
|
||||
push r10
|
||||
push r11
|
||||
push r12
|
||||
push r13
|
||||
push r14
|
||||
push r15
|
||||
|
||||
; Call C handler with pointer to register state
|
||||
mov rdi, rsp
|
||||
call interrupt_handler
|
||||
|
||||
; Restore all registers
|
||||
pop r15
|
||||
pop r14
|
||||
pop r13
|
||||
pop r12
|
||||
pop r11
|
||||
pop r10
|
||||
pop r9
|
||||
pop r8
|
||||
pop rbp
|
||||
pop rdi
|
||||
pop rsi
|
||||
pop rdx
|
||||
pop rcx
|
||||
pop rbx
|
||||
pop rax
|
||||
|
||||
; Clean up error code and interrupt number
|
||||
add rsp, 16
|
||||
|
||||
; Return from interrupt
|
||||
iretq
|
||||
@@ -7,6 +7,8 @@
|
||||
*/
|
||||
|
||||
#include "kernel/kernel.h"
|
||||
#include "kernel/gdt.h"
|
||||
#include "kernel/interrupts.h"
|
||||
|
||||
/*
|
||||
* Kernel main entry point
|
||||
@@ -19,13 +21,13 @@ void kernel_main(BootInfo* boot_info) {
|
||||
// Suppress unused parameter warning
|
||||
(void)boot_info;
|
||||
|
||||
// TODO: Set up minimal page tables (identity mapped or simple offset)
|
||||
// Initialize GDT (Global Descriptor Table)
|
||||
gdt_init();
|
||||
|
||||
// TODO: Set up IDT with only interrupts we need:
|
||||
// - Keyboard/mouse (USB or PS/2)
|
||||
// - Timer (for QT event loop)
|
||||
// - GPU (if needed)
|
||||
// That's it! Maybe 5 interrupt handlers total.
|
||||
// Initialize IDT (Interrupt Descriptor Table)
|
||||
idt_init();
|
||||
|
||||
// TODO: Set up minimal page tables (identity mapped or simple offset)
|
||||
|
||||
// TODO: Simple memory allocator (bump allocator is fine)
|
||||
|
||||
|
||||
Reference in New Issue
Block a user